Designers of space constrained systems face the
challenge of determining how to incorporate
expanding function needs into reduced spaces in a
timely and cost effective manner. For many handheld,
portable and other small form factor products,
silicon packaging has become the major size-limiting
element of their design layout.
The conversion from standard semiconductor packaging to unpackaged die provides the designer a more efficient use of the limited space. At the same time, bare die implementation affords improved electrical performance, better signal integrity and higher levels of integration with reduced weight and height.
These benefits allow designers to overcome the challenges of small form factor applications.
The implementation rate of die products is rapidly increasing as a result of both application form factor needs and system performance improvement requirements. The main customer application drivers in the migration from packaged semiconductor die to wire bond or bumped flip chip die include electrical performance, size and weight, cost of ownership, integration, manufacturability, reliability, and market growth.
With the advent of multichip modules (MCMs) and
system in a package (SiP) applications, customer
demand for known good die (KGD) has increased offer
the KGD for the discrete products
KGD: Know Good Die
defined by JESD49A
Quality conformance to the applicable method 2010 of MIL-STD-883; methods 2072 and 2073 of MIL-STD-750.